Senior Design Engineer - Post Silicon Validation

We are validating building blocks in FPGA on board level to ensure functionality and performance aspect of Design intent. FPGA consists of

various IPs as a building block such as SERDES(PMA/PCS), Memory DDR(DDR4, LPDDR4, DDR5 etc), DPHY, PLL, DSP, Fabric, I/O etc.

As a Silicon Design Validation engineer, you will have an opportunity to learn and train yourself on how to validate one/or many of the building

blocks within the FPGA. And also, you will be able to acquire knowledge on process/methodology required for validating certain IPs from

planning to completion. While you are working on those, you will be exposed to cutting edge equipment and advanced boards as well as

Various SW/tools/scripts.

What you’re going to be exposed to and learn:

The ideal candidate is highly motivated in developing a career in Silicon Design Validation engineering. You will get significant exposure and

training in the following areas:

Chance to learn FPGA and it’s build block such as SERDES(PMA/PCS), Memory DDR(DDR4, LPDDR4, DDR5 etc), DPHY,

PLL, DSP, MIPI, Fabric, I/O etc but not limited.

•

• Validate and characterize various IPs from silicon arrival to release to production.

• Develop validation and characterization plans for certain IP, bench hardware and software.

• Develop test logic RTL to achieve intended validation/characterization test.

Drive new silicon product bring-up, validation, debug to asses IP functionality/performance. Characterizing data sheet

parameters. Analyzing the measured data with statistical view. Data sheet preparation etc.

Serve as the central resource with design, verification, manufacturing, test, quality and marketing/apps as the product(s) move

Silicon arrival to product release.

• Supporting customer issues as required to resolve issues found after product release

You Have…

• 5+ years of experience

• Electrical Engineering degree with a strong desire to pursue an engineering career in Silicon Design Validation

Knowledge in High Speed Serdes Interface characterization and protocol compliance testing such as

PCIe/Ethernet/SDI/CoaXpress/JESD204, MIPI D-PHY, MIPI CSI/DSI-2, USB and DisplayPort/HDMI etc.

• Knowledge in high speed board design and signal integrity evaluation/debug.

• Knowledge in Verilog/VHDL and design implementation using FPGA development tools.

• Knowledge in test automation development using programming languages such as Python, Perl.

• Knowledge of statistical analysis concepts and use of analysis tools such as JMP, R.

• Exposure on bench equipment for device characterization such as BERT, VNA, Oscilloscopes, Protocol Exerciser/Analyzers.

• Exposure on FPGA(emulation/prototyping etc)

• Strong written and verbal communication skills to work with cross-functional team

• Self-motivated and proactive with critical thinking.

• Good problem solving and debugging skills.