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Senior ATE Wafer Test Engineer
Nokia
USA
Full-time
Senior · 5+ years experience
Hybrid
Discovered 2 weeks ago
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About the Role
Nokia is seeking a Sr Analog Wafer Level ATE Test Engineer to support existing IC ATE development and production The position is within the Optical Modules Group (OMG) in Sunnyvale, CA
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Responsibilities:
- Interface with external vendors for R&D and production testing
- Ensure and correlate test SW and HW to written Test Plan
- Production yield tracking, milestone tracking, problem assessment/disposition and invoice tracking
- Wafer level ATE platform support of production, yield analysis, failure Paretos and yield improvement
- Production logistics including ASIC wafer tracking and travelers
- Supporting engineering releases through pilot runs and production
- Develop, debug and release production methods and procedures to improve efficiency and yield compliant to TL/ISO manufacturing standards
- Responsibilities: - Interface with external vendors for R&D and production testing - Ensure and correlate test SW and HW to written Test Plan - Production yield tracking, milestone tracking, problem assessment/disposition and invoice tracking - Wafer level ATE platform support of production, yield analysis, failure Paretos and yield improvement - Production logistics including ASIC wafer tracking and travelers - Supporting engineering releases through pilot runs and production - Develop, debug and release production methods and procedures to improve efficiency and yield compliant to TL/ISO manufacturing standards
Qualifications
- Experience Required:
- BS EE/physics with 5+ years industrial experience
- Analog wafer level IC testing
- Must have experience with probe card cleaning, maintenance and debug
- Must have experience with ATE platform and wafer prober setup and operation
- Must be able to assemble coherent and concise reports summarizing status and next steps
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