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Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Define the sub system architecture, micro-architecture and register specification for highly complex SoCs. Drive and participate in specification
writeup
Conduct detailed performance, architectural and design requirement reviews with cross-functional teams, IP Vendors and customers
Implement a specification using RTL coding techniques and best practices
Work with third party vendors to define customization requirements of third party IPs (controller, PHY , etc.)
Work with the physical design teams, reviewing and providing guidance in floorplanning, power analysis, synthesis and timing signoff.
Work with the verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip simulation
and emulation, performance and power analysis and debug
Help develop and/or evaluate design and verification methodologies and participate in improving existing ones
Collaborate with and provide guidance to the post silicon and software teams for prototype bring up and performance tuning
Provide mentorship to the more junior team member
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Bachelor’s or master’s degree and/or PhD degree in Computer Science, Electrical Engineering or related fields and 12+ years of related professional experience.
Experience in creating architectural, micro-architectural, and register specifications.
Verilog/System Verilog RTL coding with System Verilog assertions
Well-versed in all stages of the ASIC design flow (including specification, architecture and design implementation, prototype bring-up)
Should have worked on Full Chip Integration of Complex SoC design.
Has worked on complex chips such as network processors, CPUs ,GPUs ,NOCs ,Switches , Machine Learning SoCs etc. owning full chip,
subsystem and block level architecture and design
Expertise in any of the following domains would be a big plus: networking, embedded systems architecture, computer architecture, machine learning
accelerators
Experience with scripting in Perl/Python/Shell
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
Global leader in data infrastructure semiconductor solutions.
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Senior · 12+ years experience
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