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Key skills for this role
Design and build new scalable systems
Maintaining FPGA code
Use Python for unit testing
Use model-sim for simulation
Debug and fix FPGA issues
Innovate and design solutions that will overcome current limitations
PhD in Electrical Engineering, Computer Architecture, or another closely-related engineering discipline (in the progress of obtaining or has obtained)
Experience coding in VHDL/verilog
Proficiency with Python for unit testing
Used Xilnix and/or Altera FPGAs
Familiar with Modelsim
Previously worked on large FPGA stratix V or/and Virtex ultra-scale+ is a plus
Knowledge of networking protocols:IP,/TCP/UDP etc.
Highly analytical mindset
Excellent communication skills, both written and oral
Results oriented, highly flexible, team player
Can tackle new things without a lot of help; fast learner
Driven and self-guided
Ability to function independently and take ownership
Ability to multitask and iterate quickly towards a better solution
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Full-time
Senior
Onsite
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