Principal Engineer - IP Verification

We are seeking a highly motivated, technically strong, and execution-focused Individual Contributor to lead and deliver first-pass success for complex Digital IP and Subsystem verification programs. The role demands deep expertise in advanced verification methodologies, strong ownership mindset, and ability to collaborate across multi-disciplinary and global teams.

The individual will work closely with System Architecture, Design, DFT, Mixed Signal, and Validation teams across sites to address verification challenges spanning IP, Subsystem, and full SoC context, leveraging simulation, formal verification, hardware modeling, and pre/post silicon validation techniques.

Lead end-to-end verification execution for complex IPs and Subsystems, ensuring high quality and first-pass silicon success

Evaluate, adopt, and deploy advanced and scalable verification methodologies to handle increasing design complexity

Own verification quality metrics across planning, execution, and closure phases

Drive ‘Zero Defect’ mindset through rigorous process adherence, coverage closure, and defect prevention strategies

Analyze existing verification flows and implement improvements to enhance efficiency, predictability, and quality

Contribute to and influence technical innovation within the team, including methodology evolution and automation

Collaborate effectively across local and global cross-functional teams including Design, DFT, Architecture, and Validation

Support pre-silicon and post-silicon validation activities where required

10–15 years of hands-on experience in IP or Subsystem verification for complex, multi-million gate designs