Principal Engineer, CAD

Support and maintain end-to-end tapeout flows, including coordinating and executing tapeout submissions to foundries, ensuring compliance with foundry requirements, schedules and quality standards

Support Schematic Capture, Analog and Mixed-signal Simulation, Layout and Layout Verification software and workflows using established revision-controlled processes

Support and maintain digital simulation, verification environments, digital place-and-route tools

Develop and maintain CAD utilities, automation scripts and regression flows to improve design efficiency and consistency

Perform Functional Evaluation, Performance Benchmarking and Deployment of New Tools

Provide CAD Software & Linux User Support for CMOS Design Engineers & IC Layout Designers

Prepare and maintain clear user documentation, best practices and training material for design teams across sites

Responsible for diagnosis, resolution, regression of reported problems in a timely manner

Interfacing directly with EDA Vendors’ Application and support teams to resolve and influence product improvements

Support additional CAD-related initiatives and projects as assigned

Qualifications & Requirements:

BA/BS Degree in Electrical Engineering, Computer Science or related field

Minimum 7 years of experience with analog and digital new product development CMOS IC CAD support using EDA tools

Must have experience supporting: 1. Cadence Virtuoso Schematic Editor and Layout Suite, Spectre, Spectre-RF, Multi-Mode Simulator, Physical Layout tools, Assura, PVS, Pegasus, Innovus, Tempus 2. Siemens Analog Fast-Spice, Questa, Parasitic CALIBRE PVS, XRC 3. Synopsys Design Compiler, VCS, SpyGlass and other tools Programming languages: DFII SKILL, PERL, MATLAB, Tcl/Tk, C / C++, Python Proficient at Linux OS, utilities, and scripting

1. Cadence Virtuoso Schematic Editor and Layout Suite, Spectre, Spectre-RF, Multi-Mode Simulator, Physical Layout tools, Assura, PVS, Pegasus, Innovus, Tempus

2. Siemens Analog Fast-Spice, Questa, Parasitic CALIBRE PVS, XRC

3. Synopsys Design Compiler, VCS, SpyGlass and other tools

Programming languages: DFII SKILL, PERL, MATLAB, Tcl/Tk, C / C++, Python

Proficient at Linux OS, utilities, and scripting

Desired Characteristics & Attributes:

Excellent written and verbal communication skills required

Ability to work well with others in a fast-paced collaborative team environment

Strong problem-solving skills, attention to detail and a proactive approach to continuous improvement.

Compensation Range:

At SiTime, we believe great work deserves great rewards. We offer a comprehensive and highly competitive compensation package designed to attract top talent.

In addition to base salary, this role is eligible for a quarterly bonus tied to the achievement of innovation goals—reflecting our commitment to recognizing meaningful impact. We also offer equity grants, providing a meaningful opportunity to share in the company’s future growth and success.

Benefits offered : 401k plan, health and wellness that includes medical, dental, vision, life, parental leave, legal services, and time off plans.

SiTime is an Equal Opportunity Employer . We treat each person fairly and we do not tolerate discrimination or harassment against anyone on the basis of any protected characteristics, including race, color, religion, national or ethnic origin, sex, sexual orientation, gender identity or expression, age, disability, pregnancy, political affiliation, protected veteran status, protected genetic information, or marital status or other characteristics protected by law. SiTime participates in the E-Verify program.

Learn More about SiTime: Review the Get to Know SiTime section of our career page to explore our culture, values, and what makes us unique.

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