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Principal Digital Design Engineer
NXP Semiconductors
Noida, IND
Full-time
Senior · 10+ years experience
Discovered 1 weeks ago
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Key Responsibilities
Design and develop RTL (Register Transfer Level) code using Verilog/SystemVerilog/VHDL
Architect and implement complex digital blocks and subsystems
Perform functional verification using simulation tools and methodologies (UVM/OVM)
Develop and execute testbenches and validation plans
Perform logic synthesis, timing analysis, and area optimization
Debug and troubleshoot design issues at RTL, gate, and silicon levels
Collaborate with verification, physical design, and firmware teams
Ensure designs meet power, performance, and area (PPA) targets
Participate in design reviews, code reviews, and technical discussions
Work with EDA tools for design implementation and validation
Support post-silicon validation and bring-up activities
Technical Skills
- Strong proficiency in:
- Verilog / SystemVerilog / VHDL
- Experience with:
- RTL design and simulation tools (ModelSim, VCS, Xcelium)
- Synthesis tools (Design Compiler, Genus)
- Static Timing Analysis (PrimeTime)
- Understanding of:
- Digital logic design concepts
- FSMs, pipelining, clock domain crossing (CDC)
- Low-power design techniques
- Knowledge of:
- FPGA/ASIC design flow
- Bus protocols (AXI, AHB, APB)
- Experience in debugging using:
- Waveform tools (Verdi, SimVision)
Preferred Skills
Experience with UVM-based verification methodology
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