Principal DFT Engineer

Preferred Qualifications

• Strong understanding of industry standards and best practices in DFT, ATPG, JTAG, and MBIST.
• Proven experience in developing DFT specifications and architectures for complex designs.
• Expertise in debugging DFT issues, including ATPG patterns, MBIST implementations, coverage analysis, and more.
• Proficiency in Cadence tools like Modus and Genus for DFT implementation, vector generation, and verification.
• Ability to conduct experiments during silicon debug, effectively gather and analyze data to identify root causes.
• Efficient scripting skills using TCL for automating tasks and developing custom flows.
• Candidates must reside in the Bay Area and be available for occasional in-person collaboration, with plans to establish a local office in the future. Occasional travel to other company locations may be required.
• The target base salary range for this position is $160,000–$300,000 annually, with actual compensation determined by level, experience, and qualifications. Total compensation includes stock options and a generous benefits package.