Principal Design Engineer

Role specifics:

This is a full-time Principal Engr position located in Pune, India.

The role will focus on FPGA projects concentrated in Pune and similar time zones.

The qualified candidate will lead the design and development of complex components of FPGA, ensuring they meet performance, power, and area targets

The qualified candidate will be expert in driving Subsystem development and ensure design meets high standards of quality and reliability, conduct regular reviews and audits

The role requires working closely with architecture team to define micro architect and design spec

Serve as a technical expert in SoC design, providing guidance and support to other engineers.

The successful candidate will be open and willing to both (a) teach best-known-methods to an existing FPGA team and (b) learn from the team about the complications of highly programmable FPGA fabrics. This role carries the need to be both a strong educator and a open-minded student.

Accountabilities:

Serve as a key contributor to FPGA design efforts.

Drive logic design of key FPGA system & full chip and bring best-in-class methodologies to accelerate design time and improve design quality.

Ensuring design quality throughout project development conducting regular reviews and audits

Work with cross functional team including program management, package design, pre and post silicon validation to drive the program

Develop strong relationships with worldwide teams.

Drive continuous improvement initiatives, staying up-to-date with the latest industry trends and technologies

Occasional travel as needed.

Required Skills:

BS/MS/PhD Electronics Engineering, Electrical Engineering, Computer Science or equivalent.

15+ years of experience in driving logic design across a multitude of silicon projects.

Expertise in SoC integration, defining micro-architecture and experience of selecting 3rd party IP.

Expertise in working with ARM processor, AXI, AMBA bus, ENET, PCIE, USB, safety and/or security protocols, debug architecture.

Experience in leading the project through out design cycle and working with cross organization

Familiarity with FPGA designs, use-cases, and design considerations is a plus.

Proven ability to work with multiple groups across different sites and time zones.

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 800 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA , CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com . You can also follow us via Twitter , Facebook , or RSS . At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.

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