Power Electronics & Motor Drives Engineer — PhD/Postdoctoral Development Programme

• Design, analyse and validate three-phase GaN inverter architectures for BLDC and PMSM drives.
• Select and characterise GaN devices, gate drivers, DC-link components and supporting power-stage components.
• Define gate-driver architecture, isolation, biasing, safe switching and shutdown behaviour.
• Optimise dead time while preventing shoot-through across operating conditions and device variation.
• Analyse switching transients, ringing, parasitic effects, dv/dt, di/dt and common-mode behaviour.
• Define and review EMC, gate-loop, commutation-loop and high-speed switching layout constraints with PCB implementation partners.
• Estimate and measure conduction and switching losses, inverter efficiency and the practical benefit of GaN devices.
• Assess junction, case and board temperatures and support thermal design and full-load validation.

• Define and integrate phase-current, DC-bus voltage and temperature sensing into the control platform.
• Specify ADC front-end performance, bandwidth, filtering, scaling, isolation and signal-integrity needs.
• Develop over-current, over-voltage, under-voltage, over-temperature, shoot-through prevention, interlock and controlled shutdown behaviour.
• Plan and execute safe staged power-up, low-voltage testing, double-pulse testing and progression to full-load operation.
• Use oscilloscopes, differential probes, current probes, power analysers and thermal measurement equipment to debug real hardware.
• Investigate faults methodically and document limits, assumptions, test evidence and corrective actions.

• Develop and validate field-oriented control for BLDC and PMSM machines.
• Implement and verify Clarke and Park transforms, d/q current control, speed and torque control, PI regulators and anti-windup.
• Develop SVPWM and PWM strategies for deterministic control operation at up to 100 kHz, subject to system requirements.
• Define ADC and PWM synchronisation, current-sampling points, rotor-angle handling and control-loop timing.
• Apply motor parameters including R_s, L_d, L_q and flux linkage to controller configuration, simulation and validation.
• Manage current, voltage and modulation limits, saturation, start-up, transient response and fault recovery.
• Analyse stability, torque ripple, speed response, parameter variation and operating-point sensitivity.

• Translate control algorithms into deterministic, fixed-point architectures suitable for FPGA implementation.
• Define word lengths, scaling, latency, pipelining, resource use, numerical limits and verification tolerances with the FPGA team.
• Integrate motor-twin outputs and adaptive-control algorithms supplied by research and project partners into Novomorphic's hardware abstraction and control platform.
• Support hardware-in-the-loop, bench and dynamometer testing across firmware, FPGA, sensing and power-stage interfaces.
• Contribute to system architecture, requirements, interface definitions, design reviews, test plans and technical risk management.
• Take increasing ownership of design decisions and technical delivery, progressing towards independent technical ownership within 6-12 months.

• Diagnose oscillation, torque ripple, incorrect current, poor efficiency and unstable transient behaviour on real motor-drive hardware.
• Separate root causes arising from controller tuning, motor parameters, PWM timing, current measurement, rotor angle, saturation, voltage limits, dead time or the power stage.
• Use measured evidence to close the loop between simulation, FPGA behaviour, analogue signals and power-stage performance.

• Deep capability in GaN three-phase inverter design, gate drive, dead-time optimisation, switching-loss analysis, sensing and protection.
• Deep capability in FPGA-based FOC, d/q current control, SVPWM, loop tuning, timing and stability validation.
• Strong practical judgement in thermal behaviour, EMC constraints, parasitics and high-speed switching layout review.
• The ability to take a real inverter from first power-on through closed-loop operation to safe full-load validation.
• System-level ownership across power electronics, analogue sensing, FPGA control, firmware and motor behaviour.

We are looking for a practical PhD-level engineer with a strong grounding in power electronics and motor drives.

You may be deeper in either GaN power-stage engineering or motor control today, but you must be able to work credibly across the complete drive system and develop depth at the interface between the two.

• A completed or near-completion PhD in power electronics, electrical or electronic engineering, motor drives, control engineering, or a closely related field.
• Strong understanding of three-phase inverter operation, switching devices, gate drives, dead time, protection and DC-link behaviour.
• Strong understanding of BLDC/PMSM drives and field-oriented control, including Clarke/Park transforms, d/q current loops, PI control and SVPWM.
• Practical laboratory experience with power electronics or motor-drive hardware, including safe bring-up and oscilloscope-based debugging.
• Ability to analyse control-loop stability, switching behaviour, sensing errors and interactions between the control system and power stage.
• Working knowledge of motor parameters, torque/speed behaviour and how model assumptions affect real drive performance.
• Understanding of deterministic digital control and fixed-point implementation constraints.
• Ability to communicate technical decisions, assumptions, risks and test results clearly.
• A practical approach to safe engineering, documentation and delivery in a multi-disciplinary team.

• Hands-on GaN device characterisation, double-pulse testing or high-speed switching measurement.
• Design or validation of gate drivers, isolated supplies, hardware comparators or protection circuits.
• Fixed-point FOC implementation in FPGA, SoC FPGA, DSP or real-time embedded hardware.
• ADC/PWM synchronisation and current reconstruction for low-inductance, high-switching-frequency drives.
• Motor-twin, model-in-the-loop, software-in-the-loop or hardware-in-the-loop workflows.
• Adaptive control, online parameter estimation or automatic dead-time optimisation.
• EMC investigation, parasitic extraction, thermal modelling, dynamometer testing or power-analyser measurements.
• Requirements capture, design assurance or verification within an industrial research and development programme.

Tools and Environments

Relevant experience may include MATLAB/Simulink, PLECS, LTspice or similar circuit and system simulation tools; VHDL, Verilog or SystemVerilog; FPGA vendor toolchains; Python; oscilloscopes, differential and current probes, power analysers, electronic loads, motor dynamometers and thermal measurement equipment.

Exact tools are useful, but sound engineering judgement and the ability to learn new environments matter more.

This role requires expertise in motor drives: control, inverter design, sensing, protection, FPGA, firmware, GaN integration and hardware validation.

Detailed electromagnetic motor design is not a core requirement.

Stator and rotor geometry, winding and magnet design, electromagnetic FEM, detailed loss-map generation and machine mechanical design sit outside Novomorphic's main scope.

• Take ownership and follow through.
• Enjoy solving difficult technical problems.
• Are curious, practical, and willing to learn quickly.
• Can work independently without disappearing into a silo.
• Collaborate well with people from different disciplines.
• Communicate clearly, especially when raising risks or blockers.
• Are comfortable in a start-up environment where priorities can move quickly.
• Want to build real semiconductor capability, not just write papers.

• You understand the architecture, safety case, interfaces and test plan for Novomorphic's GaN motor-drive platform.
• You can bring up and instrument the inverter safely, explain its switching behaviour and identify the main loss and thermal drivers.
• You can configure, tune and validate the FOC current loops and diagnose unstable or incorrect motor behaviour using measured evidence.
• You contribute reliable fixed-point control requirements and verification evidence for FPGA implementation.
• You work effectively across power electronics, analogue, FPGA, firmware, systems and external project partners.
• Within 6-12 months, you progress towards independent technical ownership of defined motor-drive work packages.

Novomorphic?

You will help build a core UK capability in compound-semiconductor power electronics and intelligent motor control.

The role offers unusual breadth: device switching, analogue sensing, real-time control, FPGA implementation and complete drive-system validation.

You will work on real hardware and help shape the architecture, engineering methods and technical culture of a growing semiconductor design company.

Novomorphic's benefits package includes:

• 28 days' annual leave plus bank holidays
• Salary sacrifice pension scheme
• Annual discretionary bonus scheme
• Life assurance
• Private medical insurance
• Additional benefits tailored to employee needs

This role is based in Cardiff, Wales.

Working arrangements may vary depending on project and business requirements.

Candidates must have the right to work in the UK or be eligible for sponsorship, where applicable.