Photonic IC Development Tech Lead

This role is intended for a recognized industry leader who has repeatedly translated silicon photonics innovation into high-volume commercial products and who can build the design platform, organization, and methodology required for sustained product leadership. The ideal candidate combines deep expertise in silicon photonics design, PDK and design-flow development, testability, reliability, and manufacturability with the ability to build high-performing teams and drive execution across design, process, packaging, test, and operations. This leader will play a central role in establishing our device/platform roadmap, in-house design infrastructure, and production-ready methodology for next-generation photonic integrated circuits. • Define the technical vision, architecture, and development roadmap for silicon photonics chip design aligned to product and business strategy. • Lead end-to-end development of silicon photonics ICs from requirements, architecture, modeling, layout, tapeout, characterization, qualification, and production ramp. • Establish and scale a world-class silicon photonics design organization spanning device design, PIC integration, co-design with electronics, verification, test, and reliability. • Drive the development and continuous improvement of an in-house PDK, including device models, layout parameterization, verification decks, process-aware design rules, and versioned release methodology. • Specify and institutionalize the silicon photonics design flow and toolchain, including simulation, schematic capture, layout, verification, DRC/LVS, variability analysis, corner analysis, and data management. • Partner closely with foundries, OSATs, packaging teams, test engineering, and operations to ensure design choices are robust, manufacturable, and cost-effective in standard production fabs and processes. • Lead design-for-testability strategy, including on-chip monitors, test structures, wafer sort methodology, parametric characterization, and production screening. • Lead design-for-reliability methodology, including aging, thermal, optical power handling, process variation tolerance, packaging interaction, environmental qualification, and field robustness. • Own technical decision-making on process-node selection, device platform tradeoffs, yield optimization, and performance/power/area/cost trade space. • Drive silicon debug, failure analysis, yield learning, and closed-loop design/process improvements through production. • Influence product requirements and system architecture through strong cross-functional engagement with product, systems, packaging, hardware, and manufacturing teams. • Mentor senior engineers and technical leads; raise the technical bar across modeling, methodology, design reviews, and execution discipline. • Represent the company externally with ecosystem partners, foundries, customers, and, where appropriate, in technical forums and industry engagements.