PDK Engineer

If you would like a new, challenging and diverse role in a ground-breaking technology company, PragmatIC is the place for you.

We are looking for a dedicated EDA engineer to design and develop Cadence Process Design Kits (PDK) for our in-house semiconductor technologies.

As part of our expanding R&D group, you will work closely with both the process development and chip design teams.

Key tasks:

• PDK development and maintenance CDF and call-backs P-Cells Skill coding Calibre verification decks - DRC/LVS/EXT User and customer support Design database migration EDA installation and setup
• CDF and call-backs
• P-Cells
• Skill coding
• Calibre verification decks - DRC/LVS/EXT
• User and customer support
• Design database migration
• EDA installation and setup
• PDK management Control and versioning of all PDK data Update and maintenance of PDK documentation and procedures Design kit releases
• Control and versioning of all PDK data
• Update and maintenance of PDK documentation and procedures
• Design kit releases
• SPICE model parameter extraction
• Cell library design and characterisation
• Maintain professional and technical knowledge by attending educational workshops; reviewing professional publications; establishing personal networks; benchmarking state-of-the-art practices; participating in professional societies
• Masters / PhD in Electronics or Electrical Engineering (or equivalent experience)
• Experience wiith CAD installation and setup (Cadence)
• Tech files - CDF, call-backs, p-cells
• Management of PDK releases (an advantage)
• Cell characterisation software (an advantage)
• SPICE model parameter extraction (an advantage)
• IC full custom design experience (Schematic capture, layout editor, SPICE simulation, verification)
• Experience with Cadence, Mentor and Tanner tools (an advantage)
• Cell library design experience (an advantage)
• Familiarity with digital design flow (an advantage)
• Skill wizard & Unix geek, especially scripting
• Knowledge of CMOS or TFT process technologies