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Lightmatter is looking for a Package Layout Design Engineer to drive the next generation products from concept to development.
You will be part of the Signal Integrity, Power Integrity and Packaging team, tasked with delivering substrate layouts that support the package architecture from concept, through design optimization and completion, meeting stringent signal integrity, power integrity, and design for manufacturing requirements.
This position offers a unique opportunity to work on new package architectures by solving complex interactions across digital, analog and photonics domains.
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Educational background in IC packaging and substrate layout design.
Familiarity with system-level validation tools such as Cadence Integrity 3DIC for package/IC codesign.
Familiarity with layout tools (e.g., Expedition Package Designer, Pads Layout, Altium, etc.).
Experience with layout tool scripting languages (e.g., SKILL or Python) to enable design automation.
Exposure to or interest in early-stage architectural pathfinding and physical feasibility studies for multi-chiplet and advanced packaging architectures (2.5D/3D IC, Silicon Interposers, EMIB, Fan-Out Chip-on-Wafer, etc.).
Experience evaluating floorplans, escape routing, bump patterns (micro-bumps / hybrid bonding), and die-to-die (D2D) interface topologies.
Excellent communication skills and the ability to collaborate effectively in cross-functional teams.
We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.
Photonic computing company merging light-based interconnects with AI hardware to build faster, more energy-efficient data center infrastructure.
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