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Key skills for this role
Bachelor's degree in Mechanical Engineering, Material Engineering, Electrical Engineering, Technology, Science, a related field, or equivalent practical experience.
8 years of experience in chip package substrate design using Cadence APD or Mentor Expedition.
Experience in chip package substrate layout, design verification, DFM and taping out for production.
Experience in design automation and scripting.
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Master's degree or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Experience in working with cross-functional teams including chip design, SI/PI, and PCB design teams.
Experience in 2.5D/3.5D advanced package design.
Experience in physical verification flow (LVS, DRC, connectivity).
Experience with CAD for creating simple mechanical drawings, such as package outline drawings (POD).
Ability to write scripts to customize elements of the Cadence or Mentor workflow.
Technology company specializing in search, advertising, cloud computing, and AI
Visit company websiteJobs and hiring trendsUSD 163000-236000 / year
Senior · 8+ years experience
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