Network-on-chip/interconnect Design -Staff Engineer

General Summary:

Network-on-chip (NoC)/ Interconnect Design and Architecture for the next generation System-on-chip (SoC) for smartphones, notebooks, smart glasses, tablets and other product categories. The roles and responsibilities for this position includes but not limited to:-

Architecture and deployment of Next-gen Qualcomm coherent and non-coherent interconnect fabric

Responsible for specification, Micro-Arch, design and verification of interconnect and related IP’s

Actively work with SoC Architecture, verification, physical design team, Soc Floorplan, core teams and various other interconnect teams in various other sites

Partner with SoC performance team ensuring Interconnect meeting all performance requirement, and with silicon validation team to co-relate pre-silicon and post silicon design assumptions

Responsible for micro-architecting all relevant debug hooks in NoC Infrastructure to help root cause silicon issues

Will be part of BDC infrastructure (NoC/Interconnect) core team