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Low Power Verification Applications Engineer
Power Analysis Application Engineer
ASIC Low Power AE
Semiconductor Power Verification Engineer
RTL Power Optimization Applications Engineer
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You have spent years deep in the low power trenches of ASIC design, and you know that power is not just another checkbox in the verification plan. It is the thing that determines whether a chip ships on time, meets its thermal budget, or gets another spin. You have debugged power reports at 2 a.m., traced glitches through netlists, and explained to a design lead why their clock gating strategy is leaking watts they cannot afford.
You are comfortable sitting with a customer's design team, looking at their UPF, their power intent, and their simulation results, and finding the gap between what they think is happening and what is actually burning power. You do not just run tools, you understand the methodology behind them. You know when to use RTL-level estimation versus gate-level signoff, and you can articulate the tradeoffs without making it a lecture.
Working across R&D, field teams, and customer sites does not intimidate you. You have learned that the best solutions come from listening first, then building the right flow for the problem at hand. At Synopsys, you will work with semiconductor companies solving real power problems on chips that will ship, and the methodologies you help build will become part of how they design.
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Partner directly with semiconductor companies across the region to solve low power verification challenges including power estimation, reduction, audit, correlation, and efficiency analysis
Deploy and optimize Synopsys low power tools like PrimePower-RTL, SpyGlass-Power, VC LP, and PTPX across customer design flows, working at both RTL and netlist levels
Debug power reports, analyze power matrices, and trace issues through UPF, RTL, and gate-level designs to resolve discrepancies and improve accuracy
Collaborate with Synopsys R&D and product validation teams to develop methodologies that address customer-specific problems and feed real-world requirements back into product roadmaps
Build and maintain automation scripts in TCL, Perl, and Unix shell to streamline power analysis workflows and improve turnaround time for customer engagements
Coordinate with technical account managers and worldwide account teams to shape customer strategies, drive tool adoption, and support successful project completion
Gather, refine, and track flow requirements based on customer feedback, engineering judgment, and emerging tool capabilities
Enable semiconductor companies to meet aggressive power budgets and ship complex chips on schedule by solving power verification bottlenecks they cannot resolve alone
Influence the direction of Synopsys low power tools by bringing real customer pain points and use cases directly to R&D teams
Build repeatable, scalable low power methodologies that become the foundation for how customers verify power across multiple projects and product lines
Accelerate customer adoption of Synopsys solutions, directly contributing to business growth and long-term account relationships in the region
Reduce customer design respins by catching power issues earlier in the flow, saving months of schedule and significant engineering cost
Establish yourself as a trusted technical advisor to design teams, the person they call when power verification gets hard
Shape how the next generation of AI, mobile, and automotive chips are designed by helping customers optimize power at every level of the design hierarchy
BE/BTech/ME/MTech in Electronics Engineering, Computer Science, or Microelectronics with 3-5 years of hands-on industry experience in ASIC design or verification
Deep working knowledge of low power verification including power estimation, reduction techniques, power exploration, audit, efficiency analysis, power-load models, memory power analysis, LP simulation, LP linting, and HW/emulation cycle-based power profiling and correlation
Proven experience with Synopsys low power tools such as PrimePower-RTL (logical and physical mode), SpyGlass-Power, VC LP, PTPX/PrimePower, or RTL Architect (PPA), or equivalent industry-standard LP signoff tools
Strong command of VHDL, Verilog, and SystemVerilog RTL, and solid understanding of ASIC design flows from RTL to tapeout
Hands-on experience debugging power reports and matrices at RTL and netlist levels, and working with UPF for low power verification
Advanced scripting skills in TCL, Unix shell, Perl, or Python for automation, flow development, and debugging
Experience with glitch power analysis and power correlation across RTL, gate-level, and emulation environments is a strong plus
You can walk into a customer meeting, quickly assess where their power verification flow is breaking down, and propose a concrete next step without needing three follow-up calls
Explaining a complex power correlation issue to a design manager or an R&D engineer feels natural to you, and you adjust your explanation depending on who is in the room
You are organized enough to manage multiple customer engagements at once, each with different tools, flows, and timelines, without dropping threads
Working across time zones, teams, and functions does not slow you down, you know how to pull the right people in at the right time and keep things moving
You push back when a customer request does not make technical sense, but you do it in a way that builds trust rather than friction
Debugging a stubborn power issue for hours, even days, does not frustrate you, it is the part of the job you actually enjoy
You will be part of the Application Engineering team supporting Synopsys' low power verification solutions across semiconductor customers in the Bengaluru region. You will work closely with R&D, product validation, technical account managers, and global AE teams to drive methodologies, solve customer problems, and enable successful project outcomes. This is a customer-facing role with deep technical collaboration across the organization.
Provider of electronic design automation software and semiconductor IP.
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