Lead Electrical Engineer

Be one of the Bedo 100

Albedo is looking for a technical lead for power and analog electrical engineering on our avionics and spacecraft-power programs.

You own electrical architecture across programs (EPS, bus regulation, battery management, isolated supplies, analog signal chains, and board- and box-level electrical design), set EE technical direction alongside engineering management, and drive the next generation of what our electronics can do.

You lead through architecture, design review, and mentoring, with the day-to-day design work delegated to other engineers.

You stay hands-on as time allows, taking the hard and high-stakes design work yourself.

• 10+ years of electrical-engineering experience
• BSEE required (MSEE preferred)
• Extensive end-to-end hardware-design experience: multiple designs taken from concept through production
• Deep power and analog expertise: DC/DC (buck / boost / flyback), battery management, bus regulation, isolated supplies, analog signal-chain and mixed-signal design; first-principles thermal, transient, and efficiency analysis
• High-voltage DC power design, including isolation, protection, and creepage/clearance discipline
• Solid grasp of digital architecture: enough to partner on the electrical interfaces and mixed-signal boundaries to FPGA / avionics and flight software
• Hands-on schematic capture AND PCB layout on complex multi-layer designs, plus a working command of signal integrity and power integrity (controlled impedance, return paths, stackup, decoupling), and the judgment to review others' designs
• EMI/EMC understanding: design for electromagnetic compatibility, grounding, shielding, filtering, and control of conducted/radiated emissions
• Strong lab / hands-on skills: power measurement, standard bench instruments, board bring-up and debug
• A track record of setting technical direction and mentoring other engineers
• Helps enforce EE design-review discipline: holds designs to the standard and gates reviews before release
• A working understanding of the space environment and what radiation does to ICs (TID and single-event effects / SEE: SEU / SEL / SET) and how that drives part selection, derating, and design margin