Lead Design Verification Engineer

Role Summary: Looking for Lead Design Verification Engineers with 6+ years of experience who will be responsible for pre-silicon verification of IPs, subsystems, and SoC designs to ensure functional correctness and high-quality silicon delivery.

Develop and execute comprehensive verification strategies, UVM-based environments, and coverage-driven verification plans to achieve verification closure.

Collaborate with architecture, design, firmware, and software teams to validate RTL implementation against specifications and micro-architecture requirements.

Job Qualification:

• Bachelor's Degree in Electrical Engineering (EE) or Master's Degree in Electrical Engineering (EE).
• More than 6 years of hands-on experience in Digital Verification within a reputed semiconductor design company.
• Strong understanding of SoC architecture, digital design, and computer architecture concepts.
• Proven experience in RTL verification using Verilog and SystemVerilog.
• Strong expertise in Universal Verification Methodology (UVM) and coverage-driven verification techniques.
• Experience in developing verification plans, testbenches, scoreboards, assertions, and constrained-random verification environments.
• Good knowledge of functional coverage, code coverage, regression management, and verification closure methodologies.
• Experience with industry-standard simulators such as VCS, Questa, and Xcelium.
• Hands-on experience verifying protocols such as I2C, I3C, SPI, AXI, PCIe, USB, Ethernet, or similar interfaces.
• Proficiency in scripting languages such as Python, Perl, Tcl, or Shell scripting for automation and debug.
• Strong debugging and problem-solving skills with attention to detail.
• Ability to analyze specifications and identify functional gaps, corner cases, and verification risks.
• Good verbal and written English communication skills.
• Ability to work effectively in cross-functional and global engineering teams.
• Self-motivated team player with a strong commitment to quality and timely project execution.