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FPGA Electrical Engineer II - Onsite

RTX

Wayne, USA

Full-time

Mid

Discovered Yesterday

Free

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Position Role Type:
U.S. Citizen, U.S. Person, or Immigration Status Requirements:
Security Clearance Type:
Security Clearance Status:
Are you ready to explore the world of aerospace and defense? Do you want to learn from and collaborate with some of the greatest minds in the industry? At RTX, our internships, co-ops and full-time careers provide an exceptional foundation to work on complex problems, advance your skills and create a safer, more connected world. Discover opportunities to make a difference at RTX.
The Multi-Product Power & Digital department is responsible for FPGA and hardware designs for electronic warfare, radar, and effector products. Job responsibilities of this role include activities such as troubleshooting electronics in a lab or production environment, performing system and circuit level analysis, supporting failure investigations, maintaining and creating documentation, hardware and/or logic design, and interacting with multi-discipline groups including suppliers.

Work onsite at our Fort Wayne, IN Location
Provide Full Lifecycle support of production quality FPGA
Generate FPGA Designs
Design and Code in VHDL for reliability and maintainability
Create complete documentation including requirements, verification plan, and users guides
Qualifications You Must Have:
Masters degree in Electrical Engineering, Computer Engineering or related Science, Technology, Engineering, or Mathematics (STEM) major.
Experience to include one or more of the following:
FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Experience with AMD (Xilinx), Altera and/or Microchip (Microsemi) devices and with tools such as AMD Vivado, Altera Quartus Prime Pro or Libero.
Hands-on experience with integration and debug of FPGA/ASIC in a lab environment
Experience with source code management, design reviews, and code release in a team development environment.
Qualifications We Prefer:

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