FPGA Design Engineer

Bachelor of Science in Computer Engineering or similar discipline.

3+ years in FPGA/ Digital Logic Design role, with experience in implementing and testing custom RTL using System Verilog or Verilog.

Experience with FPGA design flow including simulation, synthesis, and static timing analysis.

Experience with FPGA high speed interfaces.

Hands on experience with lab equipment including oscilloscopes and hardware debugging.

Excellent problem-solving and analytical skills.

Strong communication and teamwork skills.

MS (or higher) in Computer Engineering, or a related field.

Experience with AMD UltraScale/UltraScale+ FPGAs/SoCs, or equivalent.

Experience coding in embedded C/C++ (or similar) and common scripting languages (e.g. Python, tcl).

Experience implementing RTL blocks for high-speed communications, image processing, and real-time tracking systems.

Experience with Simulink or High Level Synthesis.

The US base salary range for this full-time position is $160,000-$210,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your location during the hiring process.