Firmware Engineer, Principal

Mentoring a junior engineer through a hard-to-reproduce PHY calibration bug seen in customer silicon

Developing architecture and state machines to handle multi-lane synchronization or adaptive equalization across dynamic conditions

Porting a high-level MATLAB or Python SerDes calibration algorithm to optimized fixed-point firmware

Creating a SerDes diagnostics framework accessible via both SDK and GUI

Using simulation environments and FPGA emulation to validate FW behavior before tapeout

Working with IP hardware architects to influence future revisions based on field debug learnings

BS/MS in Electrical Engineering, Computer Engineering, or related field

7+ years of experience in embedded C/C++ firmware development for hardware IP or SoCs

Technical or team leadership experience in embedded software projects from spec to production

Deep understanding of microcontroller architecture (RISC-V a plus), memory-mapped registers, ISRs, and boot flows

Strong lab debug skills, working directly on silicon with scopes, analyzers, and custom tools

Familiarity with git and modern software development methodologies

Excellent communication skills and ability to collaborate across functions and geographies

Knowledge of SerDes, high-speed IO standards (PCIe, Ethernet, UCIe, CXL, etc)

Experience with calibration algorithms, signal conditioning, and adaptive feedback control in hardware

Experience in silicon bring-up and post-silicon debug

Experience in pre-silicon firmware development (DV, emulation, etc)

Knowledge of RTOS or bare-metal FW architectures

Scripting in Python, Bash, etc. for lab automation and testing

Familiarity with digital design concepts (Verilog/SystemVerilog), simulation, and DV flows

Exposure to the OSI model, especially physical and data link layers

Understanding of signal processing concepts such as eye diagrams, jitter, BER, SNR, CTLE/DFE/FFE, etc.

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