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Embedded Firmware Engineer - FPGA Development

Cimarron Inc.

Texas, USA

Full-time

Mid · 3+ years experience

Onsite

USD 100000-160000 yearly / year

Discovered 1 weeks ago

VHDLVerilogSystemVerilogModelSimLibero SoCPCIe

Free

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Key skills for this role

VHDLVerilogSystemVerilog

Design, develop, and verify FPGA logic using VHDL/Verilog/SystemVerilog for Microchip PolarFire SoCs, including programmable logic, DSP blocks, and high-speed interfaces (e.g., PCIe, Ethernet, SERDES).
Create and optimize IP cores and custom peripherals/accelerators tailored to PolarFire's architecture.
Integrate FPGA firmware with embedded processors (e.g., RISC-V cores) and collaborate with software teams to support Board Support Packages (BSPs) and Linux kernel drivers.
Build RTL verification environments with testbenches using UVM methodologies for design correctness and coverage.
Perform functional verification, simulation, regression testing, and coverage analysis (e.g., functional, code, assertion).
Conduct synthesis, place-and-route, timing analysis, and debugging using tools like Libero SoC, logic analyzers, and oscilloscopes.
Implement radiation-tolerant and fault-tolerant designs for space-grade applications.
Develop automated test benches and CI pipelines for verification, including hardware-in-the-loop testing.
Contribute to system architecture, security, and real-time processing requirements.
Participate in code reviews, documentation, and stay updated on FPGA technologies and open-source contributions.

Due to facility security requirements, only U.S. citizens or permanent residents are eligible for consideration at this time.
3-5 years of experience in embedded firmware development, with 3+ years in FPGA design and verification.
Proficiency in VHDL/Verilog/SystemVerilog for RTL design and FPGA development.
Hands-on experience with RTL verification, testbenches, and UVM methodologies.
Familiarity with FPGA design flows, including simulation (e.g., ModelSim), synthesis, and Libero SoC tools.
Knowledge of digital design principles (e.g., clock domains, pipelining, AXI/Avalon protocols) and verification concepts like constrained-random testing.

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