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Director, Package Design Engineering
Renesas Electronics
Dallas, USA
Full-time
Director
Onsite
Discovered 3 weeks ago
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Responsibilities
- Package Technology Development/NPI, R&D, Global OSAT management for new Package Development/Product qualification, Technology Roadmap definition, R&D budget management & customer adoption programs.
- Focus on design and development of package and interconnect methods for Renesas’s AI/Datacenter Infrastructure Power packaging needs especially Smart Power Stages, Vertical Power Stages, Power Modules & Discrete FET packages. Scope also involves WBG (Ie. SiC & GaN) development along with DBC, AMB substrates and advanced interconnect technologies. Knowledge of wafer level, flip-chip, multi-chip module and power devices will be a plus.
- Benchmark, select and qualify suitable materials, processes and assembly subcontractors (OSAT) or contract manufacturers (CM).
- Work with OSAT/CM to develop, run DOE to optimize processes and establish process spec.
- Work with Product groups and Reliability team, qualify new packages and processes within required time frame.
- Resolve all process integration issues by ensuring all window checks are done on critical process steps.
- Establish production controls and monitors to ensure there is no room for quality incidents.
- Ensure smooth transition into production & implement ramp up monitor.
- Work with OSAT/CM to monitor and resolve process issues early in the production phase to ensure only parts with superior quality shipped to customer.
- Develop and maintain technical expertise on advances and innovations in power SiP/modules, wafer level packaging & flip chip interconnects.
- Participate in packaging roadmap development & focus on execution.
- Address internal and external customer complaints working with peers of Marketing, Product groups, Quality and Operations organization to satisfy growth in businesses.
- Establish & maintain package design rules.
Qualifications
- Doctorate/Masters / Bachelor’s Degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering.
- 15 to 20 years of relevant experience in package development emphasizing power SiP/module, wafer level & flip-chip packaging
- Strong understanding of power SiP/modules, wafer level/flip-chip packaging methods, assembly process knowledge, qualification methods, SPC and statistical analysis software
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