indeed
DFT Lead
AMD
IND
Onsite
Discovered 1 weeks ago
Design for Testability (DFT)SCANMBISTLBISTJTAGSpyGlass-DFT DRC
Free
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Design for Testability (DFT)SCANMBIST
Role Overview
AMD is seeking a DFT engineer to help deliver high-quality digital technologies.
The role involves technical innovation and collaboration with engineers across different sites and time zones.
Key Skills for This Role
Design for Testability (DFT)SCANMBISTLBISTJTAGSpyGlass-DFT DRC
Full Job Posting
Role Overview
AMD is seeking a DFT engineer to help deliver high-quality digital technologies.
The role involves technical innovation and collaboration with engineers across different sites and time zones.
Key Responsibilities
- Implement and verify SCAN, MBIST, LBIST, and JTAG DFT features.
- Support SpyGlass-DFT DRC debugging and coverage correlation.
- Perform scan insertion and ATPG pattern generation.
- Verify ATPG patterns with gate-level simulation.
- Analyze test coverage and reduce test costs.
- Support post-silicon bring-up and yield learning.
Preferred Experience and Credentials
- Experience with scan stitching and related concepts.
- Exposure to MBIST/BISR implementation and the Tessent MBIST insertion flow.
- Hands-on ATPG experience and familiarity with files required to run ATPG.
- Knowledge or experience with Tessent ATPG and SpyGlass-DFT is advantageous.
- Strong hands-on debugging and scripting skills are critical.
- Knowledge of TCL, AWK, or SED automation scripts is advantageous.
- Understanding of JTAG basics and experience with post-silicon bring-up are advantageous.
- Bachelor's degree with 7 or more years of experience, or master's degree with 5 or more years of experience, in Electronics Engineering or Electrical Engineering.
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