DFT Engineer (CE-64000920) at Cirrus — Austin, USA | Base Career

Full Job Posting

Work within a collaborative team environment to define, implement, and review DFT features.
You will generate, insert, and verify Memory BIST logic.
Perform scan insertion and ATPG pattern generation.
Help develop and review DFT timing and equivalence checking constraints.
Perform MBIST and ATPG pattern verification with gate level simulations.
Identify and improve any test coverage gaps.
Perform test cost planning and analysis.
Deliver MBIST and ATPG patterns to the product test group and support silicon bringup on the ATE.
MSEE with 2+ years of experience or BS with relevant industry experience.
Possess strong hands on working knowledge on ASIC DFT design and verification.
Experience in industry standard EDA tools for DFT such as FastScan, TestKompress, TetraMAX, Test Compiler etc.
Experience with Verilog, System Verilog, or VHDL.
Understanding of low power test techniques and architectures.
Knowledge of scripting languages such as Perl, Python, or TCL.
Experience with synthesis, static timing analysis, and developing timing constraints.
Strong oral and written communication skills.
Experience with flows and automation.
Work independently as well as part of a team.
Have a curious and inquiring mind with the commitment to follow through on getting answers.
Experience with debugging and root causing silicon problems.

DFT Engineer (CE-64000920)