Design Verification Architect

Bachelor’s/Master’s degree in Electrical Engineering, Computer Engineering, or related field

12+ years of experience in Design Verification , with significant exposure to large SoC verification

Proven experience in defining and deploying verification architectures for complex chips

Strong expertise in:

SystemVerilog and UVM

Coverage-driven verification (functional + code coverage)

Assertion-based verification (SVA)

Hands-on experience with Portable Stimulus (PSS) and cross-level stimulus reuse

Deep understanding of SoC architectures in AI, HPC, or Networking domains

Experience with multi-IP integration challenges , coherency, high-speed interfaces, and large-scale data movement

Strong debugging skills and ability to handle complex system-level issues

G ood to Have

Experience with AI/ML applications in verification workflows

Exposure to emulation, prototyping, or hybrid verification platforms

Familiarity with performance verification and power-aware verification

Knowledge of industry-standard protocols (e.g., PCIe, DDR, Ethernet, CXL, UCIe)

Experience building verification frameworks reused across multiple tape-outs

Strong architectural thinking with a systems-level mindset

High ownership with a quality-first approach

Bias toward automation, reuse, and scalability

Passion for adopting cutting-edge technologies , especially AI-driven verification

Ability to operate in a fast-paced environment with a fail-fast, learn-fast attitude

Excellent collaboration and leadership skills

High degree of verification reuse across programs

Achievement of coverage and quality goals within schedule

Reduction in verification cycle time through automation and AI

Strong track record of first-time silicon success

Minimal post-silicon escapes and debug cycles

The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?

That's what we solve. TylSemi builds the chiplet infrastructure IP — the IO, power delivery, and interconnect building blocks — that makes AI/HPC systems actually work at scale.

The semiconductor industry is going through its biggest architectural shift in 40 years:

• Moore's Law is dead. 2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.

• Custom silicon is now mainstream. Google, Microsoft, Amazon, Meta, OpenAI — they're all designing their own ASICs. The $50B custom silicon market is growing 30% annually.

• IO and power are the bottleneck. Solve hard problems and provide something which is a category in itself.

Translation: We're entering the market at exactly the moment when every major AI/HPC player needs what we're building, and their alternatives are disappearing.

There are no layers, no approval chains, no corporate theater.

• If you have an idea, we test it. If it works, we ship it.

• No endless meetings, no PowerPoint presentations to convince middle management.

• US team: Bay Area preferred, but we hire the best people regardless of location

• India team: Building a world-class design center in Bangalore

We're not a research project. We have paying customers, committed capital, and aggressive timelines.

This is a company, not a lifestyle business. We're building to win.

• Ownership mindset. You're not here to execute someone else's roadmap. You're here to define it.

• Bias for action. We move fast. Analysis paralysis doesn't fly here.

• Deep technical expertise. This is hard engineering. We need people who've shipped real silicon and debugged real hardware.

• Low ego, high standards. We don't care about titles or politics. We care about results.

If you're reading this, you're probably comfortable. You have a good job at a stable company with all the benefits.

We're asking you to walk away from that and bet on us.

• The market is real. AI infrastructure spending is $200B+ annually and growing 40% YoY. Every hyperscaler needs what we're building.

• The team has done this before. We've built and exited semiconductor companies at scale. This isn't our first rodeo.

• The traction is de-risked. We have LOIs, strategic investors, and a clear path to revenue.

• The work is consequential. You're not optimizing someone's ad click-through rate. You're building the silicon infrastructure that powers AI.

This is the bet. Join us and build something that matters.

Or stay comfortable. No judgment.

But if you're the kind of person who wants to take the shot, we'd love to talk.