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CPU Micro-Architecture and RTL Design Engineer (RISC-V)
Qualcomm Technologies, Inc.
Santa Clara, USA
Full-time
Mid Level
Onsite
USD 167100-250700 yearly
Discovered 1 weeks ago
Free
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General Summary
We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices using the RISC-V Architecture.
As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help with architecture/product definition through early involvement in the product life-cycle.
Roles and Responsibilities
- Performance exploration. Explore high performance strategies working with the CPU modeling team.
- Microarchitecture development and specification. From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification.
- RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals.
- Functional verification support. Help the design verification team execute on the functional verification strategy.
- Performance verification support. Help verify that the RTL design meets the performance goals.
- Design delivery. Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability and testability.
Preferred Qualifications
- Thorough knowledge of microprocessor architecture including expertise in one or more of the following areas: instruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems
- Knowledge of Verilog and/or VHDL.
Experience
with simulators and waveform debugging tools
- Knowledge of logic design principles along with timing and power implications
- Understanding of low power microarchitecture techniques
- Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
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