indeed
Associate II - VLSI
UST
IND
Onsite
Discovered 1 weeks ago
VLSI design flowSRAM and memory technologiesSynopsys memory compilersMemory views: Verilog, Liberty, LEF, and GDSPhysical design verificationDRC and LVS analysis
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VLSI design flowSRAM and memory technologiesSynopsys memory compilers
Role Overview
The role supports multiple projects in a globally distributed VLSI synthesis team.
The position focuses on memory technologies and downstream use of compiled memory views.
Key Skills for This Role
VLSI design flowSRAM and memory technologiesSynopsys memory compilersMemory views: Verilog, Liberty, LEF, and GDSPhysical design verificationDRC and LVS analysis
Full Job Posting
Role description
The role supports multiple projects in a globally distributed VLSI synthesis team.
The position focuses on memory technologies and downstream use of compiled memory views.
Responsibilities
- Read documentation and answer end-user questions about Synopsys memory compilers.
- Generate compiled memory views and perform quality assurance for each released version.
- Track program action items and progress against due dates.
- Analyze and fix physical DRCs and analyze LVS issues in Calibre.
- Support physical design floorplanning, power grid design, timing concepts, and signoff activities.
Experience and education
- Solid experience with memory technologies and understanding of SRAMs and memory compilers are required.
- Understanding of the VLSI design flow is required.
- Familiarity with memory design and memory views such as Verilog, timing files, LEF, and GDS is required.
- Familiarity with physical design verification, including DRC and LVS, is required.
- Ability to perform and interpret SPICE or similar circuit simulations is required.
- Ability to execute and modify scripts in Perl, Unix shell, Tcl, Python, or a related language is required.
- The description states 2-4 years of experience.
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