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MatX's mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead in AI quality and availability. MatX is seeking a Physical Design CAD Engineer to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. The ASIC/SOC Physically Design CAD Engineer will be responsible for creating and maintaining our CAD flow and infrastructure to produce performant and functionally correct silicon for MatX products across compute, memory management, high-speed connectivity, and other key technologies in leading-edge process nodes.
Develop, maintain, and continuously improve MatX's Physical Design flow, from RTL to GDSII flow, including construction and sign-off
Automate back-end runs, create reports, post-process logs, generate metrics, and extract insights
Evaluate, select, and deploy EDA tools and methodologies to produce best-in-class Performance-Power-Area results
Work with EDA tool vendors to drive issues and enhancements to closure
Train and support flow users and resolve any issues they might face
Manage licenses, compute, and storage and optimize for efficiency and cost
May include some development and support of the front-end CAD flow
Bachelor of Science in Electrical Engineering or equivalent
Minimum 8 years of industry experience in ASIC Physical Design
Great interpersonal and communication skills
Strong proficiency in programming languages such as Perl, Python, and TCL
Expertise developing/using industry-standard ASIC tools and methodologies for construction (e.g. partitioning, floorplanning, synthesis, place & route, clocking) and sign-off (equivalency, extraction, timing, power estimation, EMIR, physical verification)
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This is a hybrid role that will require you to work from our Mountain View, CA office 3 days a week on Tuesday through Thursday
8 years of industry experience in ASIC Physical Design and/or CAD
Experience with EDA license management, LSF and equivalent job schedulers, and cloud-based silicon development is a big plus
AI semiconductor company designing high-throughput chips for large language models and frontier AI labs.
Visit company websiteJobs and hiring trendsUSD 120000-475000 yearly / year
Full-time
Senior · 8+ years experience
Hybrid
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