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Analog IC Layout Engineer
Neuralink
San Francisco, USA
Junior · 2+ years experience
Discovered 1 weeks ago
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About Neuralink
We are creating devices that enable a bi-directional interface with the brain.
These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.
Team Description
The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-computer interfaces.
We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.
Job Description And Responsibilities
We are looking for experienced and hands-on engineers with a creative and initiative mindset, who are interested in exploring the next-generation chip design with advanced architectures and hardware accelerators with a goal of enhancing the energy efficiency, information entropy, and scalability of our wireless brain-computer interfaces towards the physical limit of silicon technology. The ideal candidates are energetic people who get excited about building things, are highly analytical, and enjoy tackling new problems. You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer, your responsibilities will include:
- Crafting state-of-the-art layouts for mixed-signal and analog circuits
- Amplifiers
- Filters
- Switched capacitor circuits
- Oscillators
- Data converters
- Power management circuits
- Reviewing layout floorplans and analyzing high-fidelity circuits with circuit engineers
- Physical verification of custom IC mask layouts (LVS, DRC, ERC)
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