Analog Engineer Intern - PhD

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Understand the requirements of the product and how your block fits into it.

Take ownership of a block to be delivered into one of Marvell’s DSP transceivers.

Evaluate tradeoffs between different circuit topologies

Perform schematic capture and layout in Cadence, Virtuoso design environment.

Run schematic level and post layout simulations to quantify and optimize circuit performance

Document design and hold a design review with the design team.

Minimum Requirements:

MS Degree in EE or related technical field(s)

Strong fundamental circuit design knowledge Detailed transistor level design Device physics Feedback and loop stability analysis

Detailed transistor level design

Device physics

Feedback and loop stability analysis

Strong communication, presentation, and documentation skills.

Design experience in either Cadence Virtuoso or Mentor Custom Compiler circuit design tools. Experience with schematic capture, layout, and simulation.