AMTS Verification Engineering

• Develop test plans, tests and verification infrastructure for complex IP's/sub-system/SOC's
• Create verification environment using UVM methodology
• Create reusable bus functional models, monitors, checkers and scoreboards
• Drive functional coverage driven verification closure
• Work with architects, designers and post-silicon teams

• Bachelor's / Masters degree in Electronics/Electrical Engineering
• 0-1 year of verification experience
• exposure in HVL based verification with expertise in SV & OVM
• Exposure in High Speed IO verification (UFS/PCIE/ XUSB)
• Good understanding of memory technology and memory sub-system
• Should have knowledge on all aspects of verification components & verification closure
• Should have flair for documentation, defining/improving methodology and achieving productivity improvement
• Ability to provide technical guidance & resolving technical conflicts desired
• Ability to communicate technical and project issues to business and technical senior management
• MUST have very good verbal and written communication skills

Rambus offers an extremely competitive compensation package, which includes a strong base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program and gym membership.

Rambus creates cutting-edge semiconductor and IP products, spanning memory and interfaces to security, smart sensors and lighting.

Our chips, customizable IP cores, architecture licenses, tools, services, training and innovations improve the competitive advantage of our customers.

We collaborate with the industry, partnering with leading ASIC and SoC designers, foundries, IP developers, EDA companies and validation labs.

Our products are integrated into tens of billions of devices and systems, powering and securing diverse applications, including Big Data, Internet of Things (IoT), mobile, consumer and media platforms.